The present invention relates generally to forming contacts on a semiconductor substrate and, more specifically, to the formation of metal bump contacts or connectors on a semiconductor substrate using micro-machining techniques.
Recent advances in data processing devices and memory circuits have resulted in the implementation of very large scale integrated circuits (VLSI) and even ultra large scale integrated circuits (ULSI). These VLSI and ULSI circuits are fabricated on semiconductor chips that include integrated circuits and other electrical parts. In order to mount a semiconductor chip to a carrier substrate, such as a printed circuit board or a ceramic substrate, solder bumps are arranged onto one of the semiconductor chip and the carrier substrate so that the semiconductor chip can be mechanically and electrically connected via metallurgical processes by melting the solder bumps.
One approach to applying and forming solder bumps and a carrier substrate is to use a solder paste. The solder paste is printed onto the carrier substrate and leads extending from the semiconductor chip are placed on the solder paste on the carrier substrate. The structure is then heated to cause the solder in the solder paste to melt so that the semiconductor chip can be mechanically and electrically connected to the carrier substrate. To place the solder paste onto the carrier substrate, a metal mask with predetermined openings is typically used. The solder paste is applied to the surface of the metal mask and a wiper is moved across the surface of the mask, thus pushing the solder paste through the openings of the metal mask onto the surface of the carrier substrate. Such masks are typically referred to as stencils.
Unfortunately, as the critical dimensions of the integrated circuits become smaller and smaller, the amount of solder paste that can be pressed through a given stencil becomes smaller and the placement of the solder paste becomes even more difficult. Additionally, with the smaller critical dimensions, the stencil mask becomes even more difficult to clean for a subsequent solder paste application as well as being subject to high rates of wear because of the constant placement of the stenoid, application of the paste to the stencil, and removal, and cleaning of the stencil.
Another method of placing conductive contacts for connecting the semiconductor chip to the carrier substrate has been to use preformed solder balls that are placed directly upon either the carrier substrate or the semiconductor chip with precisely controlled placement. Once the solder balls are in place, the solder balls are subjected to heat to cause a partial reflow so that the solder balls adhere to the solder pad. Unfortunately, in this process, as the critical dimensions of the features on the semiconductor chip tend to decrease, significant disadvantages become apparent in using this type of technique. One disadvantage is that the processing costs due to the limited process reliability and the speed of the pick and place nature of the transfer process become more evident. Another disadvantage is that the physical handling and placement of the solder balls by the machine dictates the minimum spacing allowed between solder bumps on a semiconductor chip or carrier substrate, and thus requires a semiconductor chip that would be larger than otherwise necessary for the desired VLSI or ULSI circuitry.
Additional problems involve the uniformity of the preformed solder balls. At smaller and smaller ball sizes, the average diameter of the preformed solder balls may vary greatly from the desired diameter of the preformed solder ball. This wide discrepancy in uniformity can lead to several problems. Preformed solder balls not only cannot be applied where desired, but when a too large or to small preformed solder ball is placed upon a pad, after the formation of a connection using such a performed solder ball, typically the location will be noted as either having several bad connections surrounding a ball that is too large or having a defective connection where the ball is too small. Large diameter preformed solder balls tend to prevent adjacent acceptable preformed solder balls from mechanically and electrically connecting between the carrier substrate and the semiconductor chip. Small diameter preformed solder balls are not large enough in diameter than the smaller ball, which can only touch one of the two surfaces.
Yet another technique has been developed that uses a method for forming solder balls on a semiconductor plate having apertures. One such technique is described in U.S. Pat. No. 5,643,831, entitled "Process for Forming Solder Balls on a Plate Having Apertures Using Solder Paste and Transferring the Solder Ball to Semiconductor Device", issued Jul. 1, 1997. The '831 Patent discloses a method for fabricating a semiconductor device using a solder ball forming plate having cavities. Solder paste is placed in the cavities using a solder paste application, such as a squeegee. Once the cavities are filled with solder paste, the solder ball forming plate is heated to form solder balls in the cavities while the plate is in an inclined position. The solder balls are then transferred from the plate to a semiconductor chip.
The solder ball forming plate is fabricated from a semiconductor material such as silicon, according to the following method. Initially, a substantially uniform flat surface is formed on the plate. Next, a plurality of cavities is formed in the flat surface of the plate. The cavities are formed by etching the semiconductor materials after a mask has been formed on the flat surface, each cavity having the shape of a precisely formed rhombus or parallelogram.
Yet another example of using a solder ball forming plate is disclosed in U.S. Pat. No. 5,607,099, entitled "Solder Bump Transfer Device for Flip-Chip Integrated Circuit Devices", issued Mar. 4, 1997. The '099 Patent discloses a carrier device that has cavities formed in its surface for receiving and retaining solder material. The solder material can then be transferred to a flip-chip as solder bumps. The cavities are located on the surface of the carrier device such that the location of the solder material corresponds to the desired solder bump locations on the flip-chip when the carrier device is placed in alignment with the flip chip. The size of the cavities can be controlled in order to deliver a precise quantity of solder material to the flip-chip. Further, in the '099 Patent, the apertures are fabricated so that they have a width of about 300 .mu.m at the surface of the die and a width of about 125 .mu.m at its base surface. Meanwhile, in the '831 Patent, the rhombus shaped cavities are design to produce a ball size of about 100 .mu.m in diameter. Unfortunately, both of these structures cannot yet produce a ball size for a solder ball that approaches the dimensions currently required in placing a semiconductor chip upon a carrier substrate using the flip-chip technology. Additionally, the solder ball forming cavities are limited in shape.
Accordingly, it would be advantageous to overcome the problems of producing and using solder balls having uniform sizes as have been shown in the prior art approaches of utilizing preformed solder balls or to use metal masks or stencils to apply solder paste for reflow into solder balls. Additionally, it would be advantageous to make even smaller, more precisely formed solder balls than is possible in the prior art as well as to fabricate metal traces during the same step as that of forming solder balls using a solder ball forming plate.
Not only would it be advantageous to overcome the problems of producing uniform solder ball sizes for use in connecting a device to a substrate, but it would also be beneficial to provide a way of greatly improving the precision with which solder connections are made in alignment.